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Texas Instruments /MSP432P4111 /FLCTL_A /FLCTL_ERASE_CTLSTAT

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Interpret as FLCTL_ERASE_CTLSTAT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (MODE_0)MODE 0 (TYPE_0)TYPE 0 (STATUS_0)STATUS 0 (ADDR_ERR)ADDR_ERR 0 (CLR_STAT)CLR_STAT

TYPE=TYPE_0, MODE=MODE_0, STATUS=STATUS_0

Description

Erase Control and Status Register

Fields

START

Start of Erase operation
MODE

Erase mode selected by application

0 (MODE_0): Sector Erase (controlled by FLTCTL_ERASE_SECTADDR)

1 (MODE_1): Mass Erase (includes all Main and Information memory sectors that don’t have corresponding WE bits set)
TYPE

Type of memory that erase operation is carried out on

0 (TYPE_0): Main Memory

1 (TYPE_1): Information Memory

3 (TYPE_3): Engineering Memory
STATUS

Status of erase operations in the Flash memory

0 (STATUS_0): Idle (no program operation currently active)

1 (STATUS_1): Erase operation triggered to START but pending

2 (STATUS_2): Erase operation in progress

3 (STATUS_3): Erase operation completed (status of completed erase remains in this state unless explicitly cleared by SW)
ADDR_ERR

Erase Operation was terminated due to attempted erase of reserved memory address
CLR_STAT

Clear status bits 18-16 of this register

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Register License

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Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

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Neither the name of Texas Instruments Incorporated nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data